Electronic components are becoming increasingly complex as more and more capability is being designed into the electronic components. Typically, the more complex an electrical component becomes, the greater number of semiconductor devices that need to be used to form the circuits that carry out the functions.
In the past, circuits are designed using a graphical tool to draw schematic diagrams of the circuits. Designers use a graphical program, such as Composer which is available from Cadence, Inc. of San Jose, Calif. Drawing the schematic is actually a graphical process in which the designer uses symbols to designate one of various types of transistors, such as for an NMOS or PMOS transistor. A number of transistors are designated with the transistor type, and then a wiring feature is used to connect terminals of all the designated devices together. The designer provides input ports and output ports and annotates the symbols to specify certain properties for a particular transistor. The properties specified include length and width of a gate of a transistor. Other size properties may also be designated. In short, past efforts for circuit design include a graphical way of trying to describe the particular components and the way the components are connected. Another trend is to design at least some portions of a circuit from certain building blocks (called leaf cells) which include a group of transistors. Rather than design a circuit totally from scratch, the circuit is designed by connecting these building blocks or leaf cells.
Before actually building the circuit, several tests are performed on the circuit as designed. The first test is a functional simulation. The functional simulation attempts to assure that the design of the circuit is correct. In other words, for a certain set of inputs, the circuit should produce a certain set of outputs in order for the circuit to be correctly carrying out a function. A first series of scripts or procedures are applied to the graphical data used to design the circuit. The series of scripts or procedures converts the graphical data to a hardware description language (“HDL”). One commonly used HDL is known as Verilog. Once the HDL is formed a simulation program, such as VCS Simulator available from Synopsis of Mountain View, Calif. is used to test the functionality of the circuit. Verilog is a HDL that is used to interconnect the blocks for the purpose of running a functional simulation test.
In addition, another simulation test is used to check other aspects of the circuit. A Simulation Program Integrated Circuits Especially! (“SPICE”) test is also generally performed on a circuit. The SPICE test is used to provide a reasonably detailed analysis of circuits containing active components such as bipolar transistors, field effect transistors, diodes and lumped components such as resistors, capacitors and inductors. SPICE is a circuit simulation program rather than a logic simulation program. Thus SPICE considers the voltages and currents in a circuit to be continuous quantities, not quantized into high/low values. SPICE can be used for many purposes, one of which is to simulate the timing of signals passing through the circuit. SPICE is used to identify certain problems with the design before the actual design is fabricated. Identified problems can be rectified before actually manufacturing the circuit. A second series of scripts or procedures are applied to the graphical data to convert the SPICE format. The SPICE simulation is then run on the converted graphical data.
In short, current circuit design includes using a graphical tool to draw schematic diagrams of the circuits. The circuit designer uses symbols to designate one of various types of transistors, such as for an NMOS or PMOS transistor. The resulting graphical data and designations are then converted into Verilog for a first test. The graphical data and designations are also converted into SPICE format for use in the SPICE simulation.
This method of circuit design has several problems. Among the problems is that the conversion programs are not always perfect. For example, when the conversion program converts the graphical data and designations into a hardware description language, such as Verilog, problems can occur in the functional simulation of the logic. Generally, the functional simulation of the logic results in the logic checking out correctly when in fact there is a mistake in the logic. The same can happen in the SPICE simulation. In other words, the SPICE simulation can result in the circuit checking out correctly when in fact there may be a flaw that needs to be corrected. Yet another problem is that some designers prefer not to design a circuit using graphical data and designations.
Therefore, there is a need for syntax which will avoid the necessity of converting from graphical data and designations of the transistors to a hardware description language, such as Verilog. There is still a further need to allow the design of circuits without using graphical data and designations of on the transistors.